Optimizing Memory Performance of Xilinx FPGAs under Vitis.
Ruoshi LiHongjing HuangZeke WangZhiyuan ShaoXiaofei LiaoHai JinPublished in: CoRR (2020)
Keyphrases
- field programmable gate array
- hardware implementation
- fpga implementation
- high speed
- memory management
- memory usage
- memory space
- memory requirements
- computing power
- parallel computing
- limited memory
- pipelined architecture
- hardware architecture
- image processing algorithms
- main memory
- neural network
- computational power
- artificial neural networks
- hardware design
- case study
- processing elements
- website
- memory size
- hardware software
- low memory
- programmable logic
- fpga device
- databases