A low power high area-efficiency NMOS LDO with fast adaptive bias.

Tiedong Cheng Ziyu Xiao Jianping Guo Lijun Xu

Published in: Integr. (2023)

Keyphrases

low power
power consumption
high speed
low cost
low power consumption
vlsi circuits
single chip
high power
wireless transmission
digital signal processing
cmos technology
logic circuits
mixed signal
vlsi architecture
real time
ultra low power
power reduction
low variance
multi channel
general purpose
image processing