MCBCG: Model Checking Based Sequential Clock-Gating.
Sumit AhujaSandeep K. ShuklaPublished in: HLDVT (2009)
Keyphrases
- model checking
- temporal logic
- model checker
- formal verification
- finite state
- finite state machines
- partial order reduction
- automated verification
- formal specification
- temporal properties
- verification method
- epistemic logic
- computation tree logic
- symbolic model checking
- timed automata
- reachability analysis
- formal methods
- power consumption
- pspace complete
- transition systems
- reactive systems
- process algebra
- concurrent systems
- power reduction
- linear temporal logic
- bounded model checking
- image processing
- asynchronous circuits
- modal logic
- planning domains