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A reconfigurable network-on-chip architecture for heterogeneous CMPs in the dark-silicon era.
Mehdi Modarressi
Hamid Sarbazi-Azad
Published in:
ASAP (2014)
Keyphrases
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network on chip
multi processor
low cost
interconnection networks
routing algorithm
cmos technology
network simulator
packet switched
shared memory
hardware implementation
data transfer
power dissipation
low power
program execution
belief propagation
parallel algorithm
multistage
high speed
real time