Implementation of a noise-coexistence threshold logic architecture on a GaAs-based nanowire FET network.
Ryota KurodaSeiya KasaiPublished in: Int. J. Parallel Emergent Distributed Syst. (2017)
Keyphrases
- network architecture
- mobile telecommunications
- layered architecture
- architectural design
- network model
- local area network
- hardware implementation
- computing platform
- hardware architecture
- data flow
- communication networks
- fpga technology
- management system
- design considerations
- application level
- noise level
- neural network
- dedicated hardware
- social networks
- client server architecture
- peer to peer
- network structure
- network management
- complex networks
- network traffic
- computer networks
- communication protocol
- parallel architecture
- software implementation
- real time
- future internet
- distributed computing environment
- reasoning engine
- signal to noise ratio