Designing Asynchronous Standby Circuits for a Low-Power Pager.
Joep L. W. KesselsPaul MarstonPublished in: ASYNC (1997)
Keyphrases
- low power
- delay insensitive
- power dissipation
- power consumption
- high speed
- power reduction
- logic circuits
- low cost
- vlsi circuits
- cmos technology
- mixed signal
- shift register
- high power
- vlsi architecture
- wireless transmission
- digital signal processing
- single chip
- power saving
- low power consumption
- image sensor
- asynchronous circuits
- nm technology
- high level synthesis
- real time
- long range
- image processing