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A 15 MHz - 600 MHz, 20 mW, 0.38 mm2, fast coarse locking digital DLL in 0.13μm CMOS.
Sebastian Hoyos
Cheongyuen W. Tsang
Johan P. Vanderhaegen
Yun Chiu
Yasutoshi Aibara
Haideh Khorramabadi
Borivoje Nikolic
Published in:
ESSCIRC (2008)
Keyphrases
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high speed
power consumption
clock frequency
cmos technology
nm technology
low power
mixed signal
power supply
hd video
high frequency
database systems
low cost
coarse to fine
flip flops
cmos image sensor