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Optimal processor interface for CGRA-based accelerators implemented on FPGAs.

Lukas Johannes JungChristian Hochberger
Published in: ReConFig (2016)
Keyphrases
  • optimal solution
  • user interface
  • dynamic programming
  • field programmable gate array
  • worst case
  • high speed
  • parallel processing
  • user friendly
  • single chip