A Built-in Circuit for Self-Repairing Mesh-Connected Processor Arrays with Spares on Diagonal.

Itsuo Takanami Masaru Fukushi

Published in: PRDC (2017)

Keyphrases

mesh connected
high speed
array processor
massively parallel
binary images
image processing tasks
parallel architectures
image processing
expert systems
np hard
domain knowledge
input image
denoising
processor array