A 14 µM × 26 µM 20-GB/S 3-MW CDR Circuit with High Jitter Tolerance.

Long Kong Yikun Chang Behzad Razavi

Published in: VLSI Circuits (2018)

Keyphrases

high speed
power consumption
real time
neural network
database
data sets
learning algorithm
image processing
database systems
multiscale
multi agent
computational complexity
high precision
packet loss
circuit design