Securing CAN FD by implementing AES-128, SHA256, and Message Counter based on FPGA.

Farag Mohamed E. Lagnf Subramaniam Ganesan

Published in: EIT (2021)

Keyphrases

email
high speed
field programmable gate array
real time
low cost
information security
hardware implementation
hash functions
signal processing
secret key
real time image processing
software implementation
hardware architectures
advanced encryption standard
xilinx virtex
identity management
neural network