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Torus Topology based Fault-Tolerant Network-on-Chip Design with Flexible Spare Core Placement.

P. Veda BhanuPranav Venkatesh KulkarniSoumya J.Linga Reddy CenkeramaddiHenning Idsoe
Published in: PRIME (2018)
Keyphrases
  • fault tolerant
  • interconnection networks
  • fault tolerance
  • distributed systems
  • network on chip
  • design process
  • design patterns
  • routing algorithm
  • fault isolation