A delay-optimized universal FPGA routing architecture.
Fang WuHuowen ZhangLei DuanJinmei LaiYuan WangJiarong TongPublished in: ASP-DAC (2009)
Keyphrases
- packet switching
- hardware implementation
- hardware architecture
- software implementation
- qos routing
- real time
- hardware architectures
- hardware design
- pipelined architecture
- low cost
- xilinx virtex
- management system
- dedicated hardware
- network infrastructure
- end to end delay
- fpga implementation
- dynamic routing
- parallel architecture
- multipath routing
- routing algorithm
- high speed
- real time image processing
- field programmable gate array
- shortest path
- systolic array
- fpga technology
- signal processing