Multiple-output low-power linear feedback shift register design.
Rajendra S. KattiXiaoyu RuanHareesh KhattriPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2006)
Keyphrases
- low power
- shift register
- high speed
- single chip
- low cost
- low power consumption
- power consumption
- digital signal processing
- vlsi architecture
- logic circuits
- multiple output
- power reduction
- cmos technology
- power dissipation
- nm technology
- gate array
- real time
- ultra low power
- multiple input
- coding scheme
- design process
- general purpose