A 0.9V 12-bit 200-kS/s 1.07µW SAR ADC with ladder-based reconfigurable time-domain comparator.
Xiaolin YangYin ZhouMenglian ZhaoZhongyi HuangLin DengXiaobo WuPublished in: MWSCAS (2014)
Keyphrases
- analog to digital converter
- synthetic aperture radar
- sar images
- frequency domain
- reconfigurable architecture
- low cost
- image reconstruction
- general purpose
- hardware implementation
- sar imagery
- sea ice
- series parallel
- multi objective evolutionary
- systolic array
- synthetic aperture radar images
- feature extraction
- kolmogorov smirnov
- magnetic tape
- multiscale