A Statistical Gate Sizing Method for Timing Yield and Lifetime Reliability Optimization of Integrated Circuits.
Seyed Milad EbrahimipourBehnam GhavamiMohsen RajiPublished in: IEEE Trans. Emerg. Top. Comput. (2021)
Keyphrases
- optimization algorithm
- clustering method
- detection method
- synthetic data
- dynamic programming
- integrated circuit
- statistical methods
- optimization method
- high precision
- high accuracy
- statistical information
- optimization process
- convergence rate
- global optimization
- probabilistic model
- experimental evaluation
- significant improvement
- pairwise
- statistical model
- classification method
- computational cost
- cost function
- preprocessing
- similarity measure