Low-power sector-based transition reduction bus encoding technique in SOC interconnects.

N. Chintaiah G. Umamaheswara Reddy

Published in: Int. J. Comput. Aided Eng. Technol. (2021)

Keyphrases

low power
high speed
power dissipation
cmos technology
low cost
power consumption
power reduction
high power
single chip
digital signal processing
wireless transmission
input output
logic circuits
low power consumption
vlsi circuits
gate array
image sensor
mixed signal
hardware and software
real time
delay insensitive