COMPACT DIGITAL PLL IN 65 nm CMOS.
Zhihong LuoYeung On AuBenjamin LauHenry LawPublished in: J. Circuits Syst. Comput. (2012)
Keyphrases
- metal oxide semiconductor
- circuit design
- silicon on insulator
- low cost
- cmos technology
- cmos image sensor
- power consumption
- high speed
- digital media
- analog to digital converter
- power supply
- dynamic range
- analog vlsi
- image sensor
- neural network
- integrated circuit
- artificial neural networks
- social networks
- artificial intelligence
- learning algorithm