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Design of a reference voltage buffer for a 10-bit 50 MS/s SAR ADC in 65 nm CMOS.
Prakash Harikumar
J. Jacob Wikner
Published in:
ISCAS (2015)
Keyphrases
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analog to digital converter
single chip
power consumption
cmos technology
low power
circuit design
clock gating
case study
high resolution
high speed
design process
image reconstruction
synthetic aperture radar