Design of Low-Power Wallace Tree Multiplier Architecture Using Modular Approach.
Vaibhavi SolankiAnand D. DarjiHarikrishna SingapuriPublished in: Circuits Syst. Signal Process. (2021)
Keyphrases
- low power
- vlsi architecture
- single chip
- cmos technology
- high speed
- low power consumption
- power consumption
- low cost
- mixed signal
- logic circuits
- nm technology
- vlsi implementation
- digital signal processing
- real time
- gate array
- power reduction
- power dissipation
- design considerations
- software architecture
- cmos image sensor
- hardware implementation
- design process
- dynamic range
- design methodology
- modular architecture
- high power
- multi channel
- wireless transmission
- analog to digital converter
- image processing