Computing all-pairs shortest paths on a linear systolic array and hardware realization on a reprogrammable FPGA platform.
Emina I. MilovanovicIgor Z. MilovanovicM. P. BekakosI. N. TselepisPublished in: J. Supercomput. (2007)
Keyphrases
- systolic array
- parallel architecture
- reconfigurable architecture
- data flow
- hardware implementation
- real time
- shortest path
- databases
- shared memory
- parallel processing
- linear systems
- distributed memory
- low cost
- signal processing
- high speed
- pairwise
- pattern recognition
- parallel implementation
- transfer function
- multi agent
- image processing
- computer vision