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Implementation of a parallel turbo decoder with dividable interleaver.
Jaeyoung Kwak
Sook Min Park
Sang-Sic Yoon
Kwyro Lee
Published in:
ISCAS (2) (2003)
Keyphrases
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turbo codes
parallel implementation
error correction
efficient implementation
fpga implementation
low complexity
hardware implementation
parallel computing
computer architecture
compressed images
distributed video coding
parallel architecture