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Post-Layout Simulation Time Reduction for Phase-Locked Loop Frequency Synthesizer Using System Identification Techniques.
Lechang Liu
Ramesh K. Pokharel
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2014)
Keyphrases
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phase locked loop
multipath
high voltage
input output
genetic algorithm
simulation environment
real time
mathematical model
data sets
fuzzy logic
wireless networks
simulation study
recurrent neural networks
simulation model
reduction method
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