Rethinking Last-level-cache Write-back Strategy for MLC STT-RAM Main Memory with Asymmetric Write Energy.
Yu-Pei LiangTseng-Yi ChenYuan-Hao ChangShuo-Han ChenPei-Yu ChenWei-Kuan ShihPublished in: ISLPED (2019)
Keyphrases
- main memory
- buffer pool
- data structure
- database management systems
- index structure
- cache conscious
- secondary storage
- flash memory
- memory storage
- b tree
- join algorithms
- external memory
- storage manager
- memory access
- solid state
- disk drives
- memory hierarchy
- secondary memory
- virtual memory
- cache misses
- database systems
- disk accesses
- main memory databases
- disk access
- hit rate
- processing units
- disk resident
- data management
- databases