A 10-bit 120MS/s SAR ADC using tri-switch sampling and VCM-stable switching scheme in 40-nm CMOS.
Chenyu XuDixian ZhaoPublished in: IEICE Electron. Express (2023)
Keyphrases
- analog to digital converter
- high speed
- sampling algorithm
- random access memory
- cmos technology
- protection scheme
- image sensor
- low cost
- nm technology
- flip flops
- random sampling
- image reconstruction
- synthetic aperture radar
- sample size
- single chip
- low voltage
- switched networks
- low power
- sar images
- power consumption
- monte carlo