A low active and leakage power SRAM using a read and write divided and BIST programmable timing control circuit.

Jiafeng Zhu Na Bai Jianhui Wu

Published in: Microelectron. J. (2013)

Keyphrases

power consumption
power reduction
dc dc converter
power saving
control method
disk drives
control system
power electronics
single phase
low power
power management
read write
asynchronous circuits
low cost
power dissipation
high speed
general purpose
logic circuits
active control
real time