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Efficient realization of the M-D nonrecursive filters: from sequential implementation to mapping on systolic array processors.

Adrian BurianCorneliu RusuPauli Kuosmanen
Published in: ICECS (1998)
Keyphrases
  • parallel architecture
  • systolic array
  • parallel processing
  • efficient implementation
  • reconfigurable architecture
  • parallel algorithm
  • parallel version
  • highly optimized
  • data model
  • parallel architectures