Real-Time Low-Power FPGA Architecture for Stereo Vision.
Luca PugliaMario VigliarGiancarlo RaiconiPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2017)
Keyphrases
- stereo vision
- low power
- vlsi architecture
- real time
- high speed
- low cost
- low power consumption
- single chip
- vision system
- power consumption
- gate array
- depth information
- signal processor
- stereo matching
- obstacle detection
- digital signal processing
- stereo images
- cmos technology
- power reduction
- dedicated hardware
- field programmable gate array
- nm technology
- logic circuits
- mixed signal
- pipelined architecture
- hardware implementation
- xilinx virtex
- fpga device
- disparity map
- optical flow
- vlsi implementation
- storage devices
- fpga technology
- data flow
- image processing