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A 28nm 32Kb embedded 2T2MTJ STT-MRAM macro with 1.3ns read-access time for fast and reliable read applications.

Tzu-Hsien YangKai-Xiang LiYen-Ning ChiangWei-Yu LinHuan-Ting LinMeng-Fan Chang
Published in: ISSCC (2018)
Keyphrases
  • knowledge base
  • hard disk
  • cost effective
  • read write
  • real time
  • neural network
  • routing protocol
  • design considerations
  • network simulator