Design of Low Power QPP Interleave Address Generator Using the Periodicity of QPP.
Won-Ho LeeChong Suck RimPublished in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2009)
Keyphrases
- low power
- single chip
- power consumption
- low cost
- high speed
- low power consumption
- vlsi architecture
- logic circuits
- gate array
- digital signal processing
- power dissipation
- cmos technology
- vlsi circuits
- power reduction
- mixed signal
- high power
- wireless transmission
- motion estimation
- design methodology
- low voltage
- multi channel
- ultra low power