Instruction Architecture for a High Performance Integrated Prolog Processor IPP.
Ken-ichi KurosawaS. YamaguchiShigeo AbeTadaaki BandohPublished in: ICLP/SLP (1988)
Keyphrases
- instruction set
- level parallelism
- memory hierarchy
- multi processor
- computation intensive
- parallel architecture
- inference engine
- distributed memory
- computer architecture
- floating point
- industry standard
- application specific
- logic programming
- multimedia
- memory access
- embedded processors
- memory management
- shared memory
- parallel computers
- multi core processors
- management system
- instruction set architecture
- highly parallel
- processing elements
- design considerations
- embedded systems
- parallel processing
- logic programs
- knowledge base
- memory subsystem
- single instruction multiple data