A high-voltage DC bias architecture implementation in a 17 Gbps low-power common-cathode VCSEL driver in 80 nm CMOS.
László SzilágyiGuido BelfioreRonny HenkerFrank EllingerPublished in: ISCAS (2015)
Keyphrases
- cmos technology
- low power
- high voltage
- power consumption
- vlsi architecture
- nm technology
- low cost
- high speed
- low voltage
- mixed signal
- vlsi circuits
- image sensor
- silicon on insulator
- single chip
- signal processor
- parallel processing
- digital signal processing
- delay insensitive
- power dissipation
- real time
- low power consumption
- power reduction
- operating conditions
- logic circuits
- cmos image sensor
- normal operation
- analog to digital converter
- power management
- hardware implementation
- hardware and software
- signal processing
- fuzzy logic
- neural network