Synthia: Verification and Synthesis for Timed Automata.

Hans-Jörg Peter Rüdiger Ehlers Robert Mattmüller

Published in: CAV (2011)

Keyphrases

timed automata
model checking
temporal logic
formal verification
reachability analysis
verification method
formal methods
concurrent systems
program synthesis
asynchronous circuits
first order logic
data sets
theorem prover
texture synthesis
probabilistic model
multiscale
clustering algorithm
website
databases