A 5-bit 1.25GS/s 4.7mW delay-based pipelined ADC in 65nm CMOS.
Ali MesgaraniHaipeng FuMei YanA. TekinHao YuSuat U. AyPublished in: ISCAS (2013)
Keyphrases
- analog to digital converter
- power consumption
- nm technology
- power dissipation
- low power
- cmos technology
- mixed signal
- power supply
- hd video
- image sensor
- vlsi circuits
- data flow
- power management
- power reduction
- random access memory
- cmos image sensor
- single chip
- low voltage
- linear array
- real time
- video transmission
- power plant
- silicon on insulator