A 0.18 μm CMOS multilayer and low resistive load architecture dedicated for LoC applications.
Mohamed Amine MiledMohamad SawanPublished in: NEWCAS (2013)
Keyphrases
- analog vlsi
- management system
- real time
- low voltage
- high speed
- load balancing
- neural network
- genetic algorithm
- image processing
- video sequences
- cmos technology
- architectural design
- cmos image sensor
- layered architecture
- load forecasting
- design considerations
- hardware implementation
- power consumption
- software architecture
- infrared