Verification of Asynchronous Circuits using Timed Automata.

Marius Bozga Jianmin Hou Oded Maler Sergio Yovine

Published in: Electron. Notes Theor. Comput. Sci. (2002)

Keyphrases

asynchronous circuits
timed automata
model checking
reachability analysis
temporal logic
formal verification
process algebra
formal specification
verification method
delay insensitive
formal methods
real time
concurrent systems
databases
data sets
low cost
theorem prover
decision trees
search engine
data mining