A 10b 20MS/s SAR ADC with a low-power and area-efficient DAC-compensated reference.

Maoqiang Liu Arthur H. M. van Roermund Pieter Harpe

Published in: ESSCIRC (2017)

Keyphrases

low power
power consumption
low cost
high speed
single chip
image sensor
vlsi circuits
cmos technology
high power
wireless transmission
digital signal processing
vlsi architecture
logic circuits
low power consumption
power reduction
mixed signal
synthetic aperture radar