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NoCIC: a spice-based interconnect planning tool emphasizing aggressive on-chip interconnect circuit methods.

Vishak VenkatramanAndrew LaffelyJinwook JangHempraveen KukkamallaZhi ZhuWayne P. Burleson
Published in: SLIP (2004)
Keyphrases
  • high speed
  • preprocessing
  • computational cost
  • circuit design
  • data sets
  • genetic algorithm
  • case study
  • significant improvement
  • machine learning methods
  • power dissipation