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A power-performance tunable logic with adjustable threshold pseudo-dynamic building blocks and CMOS compatibility.
Hanieh Ghaffarishad
Naser MohammadZadeh
Mohammad Bagher Ghaznavi Ghoushchi
Published in:
Int. J. Circuit Theory Appl. (2018)
Keyphrases
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building blocks
power consumption
chip design
low cost
high speed
software components
neural network
back end
power management
xml documents
multi valued