A power-performance tunable logic with adjustable threshold pseudo-dynamic building blocks and CMOS compatibility.

Hanieh GhaffarishadNaser MohammadZadehMohammad Bagher Ghaznavi Ghoushchi
Published in: Int. J. Circuit Theory Appl. (2018)
Keyphrases
  • building blocks
  • power consumption
  • chip design
  • low cost
  • high speed
  • software components
  • neural network
  • back end
  • power management
  • xml documents
  • multi valued