VLSI-based parallel architecture for block-matching motion estimation in low bit-rate video coding.
Donglai XuJohn P. BentleyPublished in: ICECS (2001)
Keyphrases
- low bit rate video coding
- parallel architecture
- block matching motion estimation
- video coding
- rate distortion
- video compression
- hardware implementation
- motion estimation algorithm
- motion compensation
- bit rate
- parallel processing
- motion estimation
- motion compensated
- motion vectors
- efficient implementation
- signal processing
- low bit rate
- video quality
- shared memory
- macroblock
- hardware architecture
- video codec
- parallel implementation
- distributed memory
- video coder
- computational complexity
- template matching
- image quality
- neural network
- motion field
- video conferencing
- pattern recognition
- image sequences
- three dimensional