A 281-nW 43.3 fJ/conversion-step 8-ENOB 25-kS/s asynchronous SAR ADC in 65nm CMOS for biomedical applications.

Chao Yuan Yvonne Y. H. Lam

Published in: ISCAS (2013)

Keyphrases

delay insensitive
parameter estimation
low cost
high speed
post processing
power consumption
low power
real time
image reconstruction
cmos technology
sar images
synthetic aperture radar
vlsi circuits
nm technology
silicon on insulator