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A new dynamic ternary sense amplifier for 1.5-bit/cell multi-level low-voltage CMOS DRAMs.

Chung-Yu WuYu-Yee Liow
Published in: ISCAS (1) (1999)
Keyphrases
  • low voltage
  • random access memory
  • design considerations
  • power line
  • power management
  • power consumption
  • cmos technology
  • low cost
  • real time
  • pattern recognition