A 115mW 1Gbps QC-LDPC decoder ASIC for WiMAX in 65nm CMOS.
Xiao PengZhixiang ChenXiongxin ZhaoDajiang ZhouSatoshi GotoPublished in: A-SSCC (2011)
Keyphrases
- power consumption
- low density parity check
- low power
- single chip
- cmos technology
- nm technology
- ldpc codes
- hd video
- integrated circuit
- metal oxide semiconductor
- distributed source coding
- power supply
- circuit design
- turbo codes
- xilinx virtex
- embedded dram
- distributed video coding
- decoding algorithm
- error correction
- silicon on insulator
- channel coding
- high definition
- low voltage
- low complexity
- message passing
- video transmission
- power dissipation
- clock frequency
- application layer
- application specific
- video coding
- hardware implementation
- compressive sensing
- video codec
- error resilience
- high speed
- image sensor
- physical layer
- video compression
- low cost
- hardware architecture
- physical design
- wireless systems
- rate allocation
- design methodology
- wyner ziv
- image transmission
- source coding
- unequal error protection
- error concealment
- random projections
- field programmable gate array