DELSIC: A Delay Simulator for Interconnect Circuits.
Rohit Sharma NitinVivek Kumar SehgalAmit KumarPreity GuptaAshish Nandan LalPublished in: CDES (2009)
Keyphrases
- power dissipation
- power consumption
- low power
- high speed
- cmos technology
- chip design
- digital signal processing
- power reduction
- logic circuits
- vlsi circuits
- simulation model
- analog circuits
- finite state machines
- delay insensitive
- data sets
- design methodology
- low cost
- evolutionary robotics
- analog vlsi
- simulation environment
- data flow
- sufficient conditions
- signal processing
- reinforcement learning