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An Outside-Rail Opamp Design Relaxing Low-Voltage Constraint on Future Scaled Transistors.
Koichi Ishida
Atit Tamtrakarn
Hiroki Ishikuro
Makoto Takamiya
Takayasu Sakurai
Published in:
IEICE Trans. Electron. (2007)
Keyphrases
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low voltage
design considerations
cmos technology
circuit design
case study
response time
high speed
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