Low-Power High-Speed ADCs for ADC-Based Wireline Receivers in 22 nm FDSOI.
David CordovaWim CopsYann DevalFrançois RivetHervé LapuyadeNicolas NodenotYohan PiccinPublished in: VLSI-SoC (Selected Papers) (2020)
Keyphrases
- low power
- high speed
- cmos technology
- single chip
- nm technology
- low cost
- wireless networks
- analog to digital converter
- wireless communication
- high power
- power reduction
- power consumption
- wireless transmission
- real time
- vlsi architecture
- wide dynamic range
- low power consumption
- logic circuits
- digital signal processing
- mixed signal
- image sensor
- low voltage
- vlsi circuits
- delay insensitive
- signal processor
- frame rate
- gate array