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A fast adder-based multiplication unit for customised digital signal processors.

Luc de VosRajeev JainHugo De ManWalter Ulbrich
Published in: ICASSP (1986)
Keyphrases
  • digital signal processors
  • real time
  • floating point
  • data flow
  • website
  • pattern matching
  • processing units
  • field programmable gate array
  • arithmetic operations