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A 0.4-to-0.8 V 0.1-to-5 MS/s 10 b two-step SAR ADC with TDC-based fine quantizer in 40-nm CMOS.
Chengcheng Zhang
Ang Hu
Dongsheng Liu
Shuo Ma
Hao Li
Zirui Jin
Jianwei Liu
Yan Wang
Wentao Yang
Published in:
Microelectron. J. (2023)
Keyphrases
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low cost
vector quantization
analog to digital converter
synthetic aperture radar
silicon on insulator
delay insensitive
cmos technology
low power
coarse to fine
coding scheme
power consumption
image compression
sar images
single chip
metal oxide semiconductor
high speed
computational complexity