An OpenCL-Based FPGA Accelerator for Compressed YOLOv2.
Anrong YangYuanhui LiHongqiao ShuJianlin DengChuanzhao MaZheng LiQigang WangPublished in: FPT (2019)
Keyphrases
- field programmable gate array
- hardware implementation
- parallel computing
- embedded systems
- image processing algorithms
- fpga implementation
- hardware architecture
- transactional memory
- computing systems
- parallel architectures
- hardware design
- reconfigurable hardware
- parallel programming
- data compression
- fpga device
- software implementation
- data structure
- compressed data
- xilinx virtex
- fpga technology
- pipelined architecture
- shared memory
- neural network
- general purpose
- suffix array
- graphics processing units
- compressed domain
- file size
- parallel algorithm
- image processing
- data sets