Soft Delay Error Effects in CMOS Combinational Circuits.

Balkaran S. Gill Christos A. Papachristou Francis G. Wolff

Published in: VTS (2004)

Keyphrases

power dissipation
logic circuits
analog vlsi
delay insensitive
circuit design
high speed
power consumption
asynchronous circuits
vlsi circuits
cmos technology
low power
error rate
error bounds
chip design
digital signal processing
relative error
mixed signal
focal plane
logic synthesis
low cost